1. Synchronous up/down counters count number of pulses applied on the clock input. They consist of flip-flops and steering logic.
2. The reversible counters have the; following inputs and outputs: clock pulses inputs for counting down and counting up; clear input for resetting counter at any time; data and load inputs for presetting counter to desirable initial number before counting of clock pulses; data out puts for indicating in binary code current number in counter; carry output for indicating overflow of counter and borrow output for indicating underflow of counter.3. The outputs of all flip-flops are triggered by a low-to-high level transition of either count (clock) input. The direction of counting is determined by which count in put is pulsed while the other count input is high.
